Simultaneous Routing and Bu er Insertion with
نویسندگان
چکیده
Locations Hai Zhou1, D.F. Wong1, I-Min Liu2, and Adnan Aziz2 1 Department of Computer Sciences, University of Texas, Austin, TX 78712 2 Department of Electrical and Computer Engineering, University of Texas, Austin, TX 78712 Abstract During the routing of global interconnects, macro blocks form useful routing regions which allow wires to go through but forbid bu ers to be inserted. They give restrictions on bu er locations. In this paper, we take these bu er location restrictions into consideration and solve the simultaneous maze routing and bu er insertion problem. Given a block placement de ning bu er location restrictions and a pair of pins (a source and a sink), we give a polynomial time exact algorithm to nd a bu ered route from the source to the sink with minimum Elmore delay.
منابع مشابه
Simultaneous Routing and Bu er Insertion with Restrictions on Bu er Locations
During the routing of global interconnects, macro blocks form useful routing regions which allow wires to go through but forbid bu ers to be inserted. They give restrictions on bu er locations. In this paper, we take these bu er location restrictions into consideration and solve the simultaneous maze routing and bu er insertion problem. Given a block placement de ning bu er location restriction...
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